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SMART FD-SOI





When technology meets intelligence and efficiency



FD-SOI substrates make the world of smart devices...

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With Moore's law slowing down, FD-SOI engineered substrates can bring differentiating solutions that exceed megatrends requirement.

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The application level advantages of FD-SOI are:

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Ultra low power

FD-SOI is an ultra low-voltage technology able to operate down to 0.4V at minimum energy per operation.

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Energy Efficiency

FD-SOI outperforms Bulk and Finfet technologies in terms of energy efficiency at a given technology node.


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Body Biasing

Body bias is a very powerful knob for PVTA compensation and performance boosting.

0.4V
operating voltage
10x
better energy efficiency
100x
less variability
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FD-SOI substrate relies on two primary innovations:

  • Firstly, an ultra-thin layer of insulator, called the buried oxide, is positioned on top of the base silicon.
  • Secondly, a ultra-thin top silicon layer is used to form the transistor channel.

The ultra-thin film FD-SOI architecture enables transistors to operate in fully depleted mode, offering an “electrical Shrink-on-Chip” solution while simplifying the manufacturing process.

Soitec FD-SOI wafers characteristics are:

  • 12nm to 15nm top silicon layer
  • 15 to 25nm BOX layer
  • 300 mm wafer
  • Atomistic uniformity and roughness
  • Low defectivity

FD-SOI technology provides the optimal balance between digital performance, mixed-signal compatibility, power consumption and cost.

Soitec produces FD-SOI wafers for technology nodes from 65nm down to 12nm, enabling ultra-low-power features, unique cost/performance tradeoff, high-reliability and high-performance-mixed signal integration for a wide range of applications.