A patented technology enabling the transfer of ultra-thin layers from etched or partially etched CMOS wafers to other materials.
This transfer is carried out by direct bonding of the plate at low temperature and by mechanical-chemical thinning.
With extensive expertise in layer transfer, Soitec tailors solutions to customer needs: Smart Stacking™ technology adapts to plates from 150 mm to 300 mm in diameter.
It is also compatible with a wide variety of substrates including silicon, glass, ceramic (polycrystalline AlN), fused silica, and sapphire.
Smart Stacking™ transfers thin layers of wafers to other substrates in a high-performance industrial environment, following these key steps:
Surface conditioning
Low-temperature molecular bonding
Wafer thinning
Edge treatment
Cleaning and metrology
This process is backed by more than 20 years of experience and a strong global patent portfolio.
Soitec’s MEMS-SOI substrate provides higher precision, enhanced mechanical performance and lower power over traditional MEMS technologies for high performance sensors
Soitec's technological innovation is focused on providing engineered substrates and advanced materials solutions that will drive the future of energy-efficient electronics
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