Last publications

Mar. 14, 2012White paper - Planar fully depleted silicon technology to design competitive SOC at 28nm and beyond (pdf)
By Philippe Flatresse, Circuit Design and Architecture, STMicroelectronics and Giorgio Cesana, Technology Marketing, STMicroelectronics, with Xavier Cauchy, Digital Applications, Soitec
This document considers the challenges to obtain competitive silicon technology for the upcoming generation of System-On-Chip ICs. It suggests planar fully depleted technology deserves serious interest. After outlining some implementation choices, a number of circuit-level benchmark results as well as some important design aspects are presented. It is found that this technology combines high performance, power efficiency and cost-effectiveness, which makes it a very attractive candidate to serve the needs of mobile and consumer multimedia SOCs starting at the 28nm node and scalable down to 14nm.

Mar. 07, 2012Soitec Solar News #2 (pdf)
Winter 2012
"Here comes the sun"

May. 12, 2011White paper - RF Substrate Technologies for Mobile Communications (pdf)
By Stéphane Laurent, Strategic Marketing Engineer and Eric Desbonnets, Business Development Manager
This paper discusses a variety of RF materials and substrates capable of meeting designers’ requirements and provide insight into how state-of-the-art expertise in substrate technology can enable the mobile devices of the next decade.

Jun. 24, 2010White paper - Forecasted impact of FD SOI technology on design (pdf)
By Xavier CAUCHY, Digital Application Manager, Soitec
As potential users of Fully Depleted Silicon-on-Insulator (FD-SOI) technology for the 22nm/20nm CMOS node and beyond realize its many interests, the question of its impact on design practices arises. Although FD-SOI for next generation technology nodes is not on commercial offer yet, it is nevertheless important to bring early answers or indications to that question. This document therefore proposes a synthesis of what is known or can be reasonably expected from FD-SOI from a design perspective, and indicates some interesting new potentialities that designers may be able to exploit.

Jun. 24, 2010White paper - Questions and answers on FD SOI technology (pdf)
By Xavier CAUCHY, Digital Applications Manager, Soitec, with François ANDRIEU, Senior Research Engineer, LETI
This document is a high level introduction to FD-SOI technology and its applicability to next technology nodes, in the form of a few key questions and their quick answers. No deep technical details are provided here, however Question 15 provides some relevant links. Short answers are provided first (hypertext links are provided, just click on the question of interest), followed by slightly more detailed answers for the interested readers.