History

Twenty years ago, SOI was a niche technology for military and aerospace applications. But two visionary researchers, André-Jacques Auberton-Hervé and Jean-Michel Lamure recognized its far greater potential – if only they could find a commercially viable, industrially robust manufacturing process.

In 1992, they founded Soitec in the Grenoble region of the French Alps, and started producing SOI wafers using the “SIMOX” method of implanting the insulating layer in the silicon wafer.

Soon, however, Michel Bruel, a colleague from CEA-Léti (one of Europe’s largest microelectronics research institutes) in Grenoble, France, patented a new method for making SOI wafers. Dubbed “Smart Cut™”, this new method involved shaving a very fine layer of silicon off one wafer and bonding it on to another, sandwiching the insulation between the top and bottom silicon.

The genius of Lamure and Auberton-Hervé was in transferring this fundamental research from the heart of a laboratory dedicated to nanotechnologies to worldwide industrial leadership in an innovative and highly competitive domain.

Today, Smart Cut technology is supported by over 1500 patents worldwide, and accounts for 95% of all SOI production wafers.

Key dates

1992 Creation of Soitec and the first SOI production line (initially based on SIMOX process technology).
1996 Smart Cut process technology promises more industrially robust technique for manufacturing high-quality SOI wafers in high-volumes. Soitec launches first SOI pilot line using Smart Cut™ process technology.
1997 Soitec enters a strategic alliance with Shin Etsu Handotai (SEH), the world leader in bulk silicon wafers. SEH licenses Soitec’s Smart Cut technology to manufacture SOI wafers for its customers.
1998 Soitec begins building the Bernin I manufacturing facility.
1999 Soitec enters the “Nouveau Marché” (now called Euronext Paris) on the Paris stock exchange.

Bernin I is inaugurated, and is the world’s largest SOI manufacturing facility.
2000 Substantial investments enable launch of 300mm SOI wafers.
2001 Expansion of Bernin I capacity; ground broken for Bernin II facility.
2002 Opening of Bernin II manufacturing facility and production launch of 300mm SOI wafers.

Creation of SCEALAB, a joint research laboratory with CEA-Léti.
2003 A production line is dedicated to strained SOI (sSOI).

Acquisition of Picogiga International.
2004 Creation of Soitec Asia, based in Tokyo, Japan.

Fabrication of first gallium nitride on insulator (GaNOI) wafers.

Siltronic (the silicon division of Wacker Chemical) licenses Smart Cut technology for SOI and sSOI production.
2005 Multi-year supply contract signed with AMD.

Creation of Soitec SE Asia sales office, based in Taipei, Taiwan.
2006 Acquisition of Tracit Technologies.

Capacity expansion of Bernin manufacturing facilities (Bernin III).

NanoSmart R&D project with CEA-Léti.

Groundbreaking ceremony of a new manufacturing facility in Singapore (Pasir Ris I).

Renewal of a $180 million contract with a major customer.

First sSOI production line opened.

Development agreement signed with ARM.

Soitec receives “Boldness and Creativity Award” from French President Jacques Chirac.
2007 Soitec and Picogiga begin sampling composite substrates for GaN RF power devices.

E2v Unveils New generation of High Sensitivity Imaging Sensors with Tracit.

Soitec and the French Agency for Industrial Innovation (AII) announce the European Commisssion approval for the funding of the strategic R&D program, NanoSmart.

Soitec CEO André-Jacques Auberton-Hervé Elected Chairman of the Newly Formed SOI consortium.
Print
Send to a friend